Multi-Core Computer Architecture | Week 9

Session: JULY-DEC 2023

Course Name: Multi-Core Computer Architecture

Course Links: Click Here

These are Multi-Core Computer Architecture Nptel Week 9 Answers

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Q1. Which component of access time in Hard Disk dominates for very short seeks (2-4 cylinders)?
Settle time
Coast time
Speedup time
Slowdown time

Answer: Settle time

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Q2. In a DRAM system that follows open row buffer management policy, which of the following sequence of commands are generated if the new request is to a different row from the row that was accessed last?
Activate
Precharge followed by CAS
Activate followed by Precharge
Precharge followed by Activate

Answer: Precharge followed by Activate

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These are Multi-Core Computer Architecture Nptel Week 9 Answers

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Q3. Which of the following is NOT a function of the DRAM controller?
Translate memory requests to DRAM command sequences.
Manage power consumption and thermals in DRAM.
Buffer and schedule incoming memory requests.
Reorganizing the stored data in DRAM for better space utilization

Answer: Reorganizing the stored data in DRAM for better space utilization

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These are Multi-Core Computer Architecture Nptel Week 9 Answers

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Q4. What is the primary goal of disk scheduling algorithms?
Minimize bits required to store a file
Maximize rotational latency
Minimize seek time
Maximize bit-cell density

Answer: Minimize seek time

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These are Multi-Core Computer Architecture Nptel Week 9 Answers

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Q5. What is the purpose of the refresh operation in DRAM?
To maintain high data density
To lower manufacturing costs
To prevent data loss over time
To increase data access speed

Answer: To prevent data loss over time

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These are Multi-Core Computer Architecture Nptel Week 9 Answers

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Q6. A 64 GB DRAM system that uses 4 channels (C0, C1, C2 and C3) has 2048 columns per row. It uses 64-bit wide memory bus to transfer data from DRAM to the processor. If adjacent memory words are mapped on to adjacent memory channels, which channel will fetch the physical address 0x2953A1B5C?
C0
C1
C2
C3

Answer: C3

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These are Multi-Core Computer Architecture Nptel Week 9 Answers

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Q7. A 4 GB hard disk that has only 1 magnetic surface for storing data has 256 cylinders and there are 128 sectors per track. If all sectors/cylinder are storing same amount of data, the maximum size of a file that occupies 8 sectors of a cylinder in KB is ______.

Answer: 1024

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These are Multi-Core Computer Architecture Nptel Week 9 Answers

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Q8. A disk drive has 200 cylinders numbered from 0 to 199. The disk arm is initially positioned at cylinder 50. There are now five pending disk requests (cyliner numbers) in the queue: 72, 55, 40, 90, 5. Calculate the total head movements to service all these requests using the SSTF disk scheduling algorithm.

Answer: 155

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Q9. Consider a 1MB DRAM on a single DIMM with two ranks, 16 banks (named as B0, B1, B2.. B15) per rank and 32 columns per row. The data bus width is 16 bytes. The addressing uses row interleaving. Which of the following physical addresses is mapped to bank number B5?
0x72AC6
0x55587
0x65B24
0x578B5

Answer: 0x72AC6

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These are Multi-Core Computer Architecture Nptel Week 9 Answers

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