Digital Circuits Week 7 Nptel Assignment Answers
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Digital Circuits Week 7 Nptel Assignment Answers (July-Dec 2024)
Q1.‘Modulus (MOD) value of the 5-bit ring counter is
A) 10
B) 50
C) 5
D) 6
Answer: C) 5
Q2. The contents of the following registers (Q4Q3Q2Q1Qo) after two clock transitions are.
(Assume initial values of all flip-flops are logic 1).
A)11110
B) 11001
C) 11010
D)11100
Answer: A)11110
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Q3The minimum number of flip-flops required to design a mod-150 counter?
A)8
B) 7
C) 6
D) 15
Answer: A)8
Q4 A MOD-2 and MOD-5 up counter when cascaded together results in a MOD _________ counter. (In integer)
a) 7
b) 2
c) 10
d) 5
Answer: c) 10
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Q5.‘‘What is the output (QxQsQcQo) sequence of the following circuit after 5 clock transitions?
(Assume initial output state of the all FFs are logic ‘0’.
A) 0001
B) 1000
C)1110
D)0110
Answer: C)1110
Q6.‘Which of the state diagram represents the following circuit?
Answer : D
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Q7. A finite state machine (FSM) is implemented using the D flip-flops A and B. and logic gates, as shown in the figure below.
Assume that Xp is held at logic ‘1° throughout the operation of the FSM. When the FSM
initialized to the state QaQp=00 and clocked, after two clock cycles, what will the output?
A) 00
B) 11
0) 10
D) 01
Answer: A) 00
Q8. The following circuits acts as…………………………..
A) Ring counter
B) Johnson ring counter
C) Circular shift register
D) Mod-3 counter.
Answer: B) Johnson ring counter
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Q9. What is the modulus value of 5-bit Johnson counter?
A) 4
B) 6
C) 8
D) 10
Answer: D) 10
Q10.Initially. outputs of all the flip-flops are reset to logic 0. What is the output (AB) after 3 clock
transitions? |
a) 00
b) 01
c) 10
d) 11
Answer: d) 11
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Q11.Which of the following sequence (Q1Qo) produced by the below circuit?
A) 00,01,10,11,00
B) 00,01,10,00,01
C) 00,01,11,00,01
D) 00,10,11,00,10
Answer : B) 00,01,10,00,01
Q12.The current state of Qa Qs of a two JK flip-flop system is 00. Identify the sequence produced by QaQs.
A) 00,01, 10, 11, 00, 01
B) 00, 11, 10, 01, 00, 11
C) 00, 11,01, 10, 00, 11
D) 00,01, 11, 10, 00, 11
Answer: B) 00, 11, 10, 01, 00, 11
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Q13.Which of the following is not an application of a shift register circuit?
A) Serial to parallel converter
B) Sequence generator
C) Look ahead carry adder
D) Delay unit
Answer: C) Look ahead carry adder
Q14.A counter is constructed with three D flip-flops. The input-output pairs are named (Do. Qo). (D1.
Q1). (D2. Q2). where the subscripts 0 denotes the least significant bit. The output sequence is
desired to be the grey code sequence 000, 001, 011, 010, 110, 111, 101, and 100 repeating periodically. Note that the bits are listed in the Q2Q1Qo format. The combinational logic expression for Dr is.
a.
b.
c.
d.
Answer: D.
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These are Digital Circuits Week 7 Nptel Assignment Answers
Q15. Which of the following sequence generated at the output by the below circuit. Assume initial state (Q3 Q2 Q1 Qo) of the circuit is 0001.
a) 0,1,1,1,1,0……
b) 0,0,1,1,1,1.
c) 0.0.0.1,1,1……
d) 1,0,0,0,1,0. …..
Answer: D) 1,0,0,0,1,0. …..
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These are Digital Circuits Week 7 Nptel Assignment Answers
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