# Digital Circuits Week 6 Nptel Assignment Answers

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## Digital Circuits Week 6 Nptel Assignment Answers (July-Dec 2024)

Q1.The state transition of T flip-flop from 0 to 1 requires
A) 0 at T-input
B) 1at T-Input
C) 01 sequence at T-input
D) None

Q2. What is the output of the following buffer for given inputs Enable = 1 and A = 0?

A) 1
B) 0
C)z
D) x

These are Digital Circuits Week 6 Nptel Assignment Answers

Q3Given the following PLA (Programmable Logic Array) circuit, what are the output F1 and F2?

A) FI=AC’+ABC. F2=AB’+A’B
B) FI=A’C+A’BC. F2=AB’+A’B
C) F1=AB’+A’B. F2=A’C+A’BC
D) FI=AC’+A’BC’. 2=AB+A’B

Q4 ‘Given the following PLA (Programmable Logic Array) circuit, what are the output F1 and F2?

A) F1=A’BC+AC’+A’B’C. F2=AC’+A’B’C+A’B’
B) F1=A’B’C+AC +A’BC. F2=AC+A’BC+AB’
C) F1=A’BC’+A’C’+AB’C, F2=A’C+AB’C+A’B
D) F1=ABC’ +A’BC’. F2=AB+A’BC

These are Digital Circuits Week 6 Nptel Assignment Answers

Q5.‘Which of the following is an example of a sequential circuit?
C) Multiplexer
D) Flip-Flop

Q6.What is a characteristic of a sequential circuit?
A) It has no memory elements.
B) Its output depends only on the current inputs.
C) Its output depends on both the current inputs and the previous state of the output.
D) It has no clock signal.

Answer : C) Its output depends on both the current inputs and the previous state of the output.

These are Digital Circuits Week 6 Nptel Assignment Answers

Q7. In a JK flip-flop, what is the output when both J and K inputs are 1?
A) The output toggles.
B) The output is set to 0.
C) The output is set to 1.
D) The output remains unchanged.

Q8. What is the output state of an SR flip-flop when both S (Set) and R (Reset) inputs are 07
A) Set(Q=1)
B) Reset (Q=0)
C) No change in output (Q remains the same)
D) Output toggles

Answer: C) No change in output (Q remains the same)

These are Digital Circuits Week 6 Nptel Assignment Answers

Q9. In an SR flip-flop. what happens if both S and R inputs are set to 1 simultaneously?
A) The output is set to 1.
B) The output is reset to 0.
c) The output is undefined or in an invalid state.
D) The output toggles between 0 and 1.

Answer: c) The output is undefined or in an invalid state.

Q10.‘‘What is the primary difference between a latch and a flip-flop?
A) Latches are edge-triggered. while flip-flops are level-triggered.
B) Latches are level-triggered, while flip-flops are edge-triggered.
C) Latches store multiple bits, while flip-flops store a single bit.
D) Both latch and a flip-flop are edge triggered

Answer: B) Latches are level-triggered, while flip-flops are edge-triggered.

These are Digital Circuits Week 6 Nptel Assignment Answers

Q11.What is the primary function of a demultiplexer?
A) To combine multiple input signals into a single output.
B) To convert analog signals into digital signals.
C) To route a single input signal to one of many output lines.
D) To amplify input signals.

Answer : C) To route a single input signal to one of many output lines.

Q12.How many select lines are required for a 1-to-16 demultiplexer?
A)2
B) 3
C) 4
D)5

These are Digital Circuits Week 6 Nptel Assignment Answers

Q13. The Flip-flop converted from J-K flip-flop is

A) S-R flip-flop with X=R and Y=S
B) S-R flip-flop with X=S and Y=R |
C) D flip-flop with X=D and Y=D’
D) D flip-flop with X=D’and Y=D

Answer: B) S-R flip-flop with X=S and Y=R

Q14. The waveform indicates the operation of.
A) Positive Edge Triggered J-K Flip-Flop
B) Positive Edge Triggered S-R Flip-flop
C) Positive Edge Triggered D-Flip-flop
D) Positive Edge Triggered T-Flip-flop

Answer: C) Positive Edge Triggered D-Flip-flop

These are Digital Circuits Week 6 Nptel Assignment Answers

Q15. How many SR latches needed to construct a master slave SR flipflop?
A) 1
B) 2
C) 3
D) 4