Computer Architecture Week 6 Assignment Nptel Answers 2024
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Computer Architecture Nptel Week 6 Assignment Answers (July-Dec 2024)
1. In a PMOS transistor, when a negative gate voltage is applied, the current flows from the _ to the _.
A) source, drain
B) drain, source
C) source, gate
D) None of the options
Answer:A) source, drain
2. In a NAND gate designed using CMOS logic, how are the two NMOS and two PMOS transistors arranged?
A) Two NMOS transistors are arranged in parallel, and two PMOS transistors are arranged in series.
B) Two NMOS transistors are arranged in series, and two PMOS transistors are arranged in parallel.
C) Two NMOS transistors and two PMOS transistors are arranged in series.
D) Two NMOS transistors and two PMOS transistors are arranged in parallel.
Answer:C) Two NMOS transistors and two PMOS transistors are arranged in series.
3. Which of the following combinations is not allowed in a non-clocked SR latch built with NOR gates?
A) S=0, R=0
B) S=0, R=1
C) S=1, R=0
D) S=1, R=1
Answer: D) S=1, R=1
4. Given the Boolean function F(A,B) = (A⋅B)’ + (A+B)’ , which of the following statements is true? Here, ‘ stands for the bit complement (NOT operation).
A) The function can be implemented using only NAND gates.
B) The function is equivalent to A’+B.
C) The function is equivalent to A.B.
D) None of the options
Answer:B) The function is equivalent to A’+B.
5. Choose the false option from the following.
A) An SRAM cell contains two cross-coupled inverters.
B) An SRAM cell uses one transistor to save a bit.
C) A DRAM cell uses a single transistor and a capacitor.
D) None of the options
Answer: B) An SRAM cell uses one transistor to save a bit.
These are Computer Architecture Week 6 Assignment Solutions
6. What is the output of a JK flip-flop when both J and K inputs are 0?
A) The output toggles.
B) The output is set to 1.
C) The output is set to 0.
D) The output is unchanged.
Answer: D) The output is unchanged.
7. Which of the following accurately describes the function of a demultiplexer?
A) It routes a single input to one of the several outputs based on select lines.
B) It combines multiple inputs into a single output.
C) It decodes a binary value to select one of the outputs.
D) None of the options
Answer: A) It routes a single input to one of the several outputs based on select lines.
8. If you have a 512X1 multiplexer, how many select lines are required?
A) 6
B) 9
C) 7
D) 8
Answer: B) 9
9. Why is it necessary to periodically refresh DRAM cells?
A) To increase the speed of data access in memory.
B) To ensure data is not lost as the charge in the capacitors gradually leaks away.
C) There is no need to periodically refresh it.
D) None of the options.
Answer: B) To ensure data is not lost as the charge in the capacitors gradually leaks away.
10. Which memory technology is generally less dense and has a lower storage capacity?
A) SRAM
B) DRAM
C) Both SRAM and DRAM have similar densities.
D) Storage capacity depends on the specific implementation, not the memory type.
Answer: A) SRAM
These are Computer Architecture Week 6 Assignment Solutions
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